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Reliability Report

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Key Specifications

Part Number	Description	Status	VCCA(Min)(V)	VCCA(Max)(V)	VCCB(Min)(V)	VCCB(Max)(V)	Max Data Rate(Mbps)	No. of Bits	Operating Temperature Range(℃)	Pin/Package	EV Kit Available?
UM3212M8	2-Bit Bidirectional Voltage-Level Translator for I2C-bus and SMBus Application	ACTIVE	1	3.3	1.8	5	66	2	-40 to 85	8/MSOP	Y

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Product Description

The UM3212 is a dual bidirectional I²C-bus and SMBus voltage-level translator with an enable (EN) input, and is operational from 1.0V to 3.6V (V_ref(1)) and 1.8V to 5.5V(V_bias(ref)(2)).

The UM3212 allows bidirectional voltage translations between 1.0V and 5V without the use of a direction pin. The low ON-state resistance (R_on) of the switch allows connections to be made with minimal propagation delay. When EN is HIGH, the translator switch is on, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports.

The UM3212 is not a bus buffer which provides both level translation and physically isolates the capacitance to either side of the bus when both sides are connected. The UM3212 only isolates both sides when the device is disabled and provides voltage level translation when active.

The UM3212 can also be used to run two buses, one at 400 kHz operating frequency and the other at 100 kHz operating frequency. If the two buses are operating at different frequencies, the 100 kHz bus must be isolated when the 400 kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by the translator.

As with the standard I²C-bus system, pull-up resistors are required to provide the logic HIGH levels on the translator’s bus. The UM3212 has a standard open-collector configuration of the I²C-bus. The size of these pull-up resistors depends on the system, but each side of the translator must have a pull-up resistor. The device is designed to work with Standard-mode, Fast-mode and Fast-mode Plus I²C-bus devices in addition to SMBus devices. The maximum frequency is dependent on the RC time constant, but generally supports > 2MHz.

When the SDA1 or SDA2 port is LOW, the clamp is in the ON-state and a low resistance connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port when the SDA2 port is HIGH, the voltage on the SDA1 port is limited to the voltage set by VREF1. When the SDA1 port is HIGH, the SDA2 port is pulled to the drain pull-up supply voltage (V_pu(D)) by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel.

All channels have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical.

The translator provides excellent ESD protection to lower voltage devices, and at the same time protects less ESD-resistant devices.

Features

- 2-Bit Bidirectional Translator for SDA and SCL Lines in Mixed-Mode I²C-Bus Applications

- Standard-Mode, Fast-Mode, Fast-Mode Plus and HS-Mode I²C-Bus and SMBus Compatible

- Less than 3.5ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Mode I²C-Bus Devices and Multiple Masters

- Allows Voltage Level Translation between:

1) 1.0V VREF1 and 1.8V, 2.5V, 3.3V or 5V VREF2

2) 1.2V VREF1 and 1.8V, 2.5V, 3.3V or 5V VREF2

3) 1.8V VREF1 and 3.3V or 5V VREF2

4) 2.5V VREF1 and 5V VREF2

5) 3.3V VREF1 and 5V VREF2

- Open-Drain I²C-Bus I/O Ports (SCL1, SDA1, SCL2 and SDA2)